Commit 4e82ec73 authored by Synthron's avatar Synthron
Browse files
parents 99628577 db35af2b
......@@ -3,7 +3,7 @@ use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity Switches_To_LEDs is
port (
port (
-- Clock
i_Clk : in std_logic;
-- Push-Button Switches:
......@@ -33,7 +33,8 @@ entity Switches_To_LEDs is
o_Segment1_D : out std_logic;
o_Segment1_E : out std_logic;
o_Segment1_F : out std_logic;
o_Segment1_G : out std_logic
o_Segment1_G : out std_logic;
o_Segment1_DP : out std_logic
);
end entity Switches_To_LEDs;
......@@ -43,6 +44,20 @@ architecture RTL of Switches_To_LEDs is
signal w_segment : integer range 0 to 15 := 0;
signal w_switch_1 : std_logic;
signal r_switch_1 : std_logic;
signal w_switch_2 : std_logic;
signal r_switch_2 : std_logic;
signal w_switch_3 : std_logic;
signal r_switch_3 : std_logic;
signal w_switch_4 : std_logic;
signal r_switch_4 : std_logic;
signal w_switch_5 : std_logic;
signal r_switch_5 : std_logic;
signal w_switch_6 : std_logic;
signal r_switch_6 : std_logic;
signal w_switch_7 : std_logic;
signal r_switch_7 : std_logic;
signal w_switch_8 : std_logic;
signal r_switch_8 : std_logic;
begin
......@@ -53,29 +68,87 @@ begin
i_Switch => i_Switch_1,
o_Switch => w_switch_1
);
Debounce_2 : entity work.Debounce_Switch
port map (
i_clk => i_Clk,
i_Switch => i_Switch_2,
o_Switch => w_switch_2
);
Debounce_3 : entity work.Debounce_Switch
port map (
i_clk => i_Clk,
i_Switch => i_Switch_3,
o_Switch => w_switch_3
);
Debounce_4 : entity work.Debounce_Switch
port map (
i_clk => i_Clk,
i_Switch => i_Switch_4,
o_Switch => w_switch_4
);
Debounce_5 : entity work.Debounce_Switch
port map (
i_clk => i_Clk,
i_Switch => i_Switch_5,
o_Switch => w_switch_5
);
Debounce_6 : entity work.Debounce_Switch
port map (
i_clk => i_Clk,
i_Switch => i_Switch_6,
o_Switch => w_switch_6
);
Debounce_7 : entity work.Debounce_Switch
port map (
i_clk => i_Clk,
i_Switch => i_Switch_7,
o_Switch => w_switch_7
);
Debounce_8 : entity work.Debounce_Switch
port map (
i_clk => i_Clk,
i_Switch => i_Switch_8,
o_Switch => w_switch_8
);
p_Register : process (i_Clk) is
begin
if rising_edge(i_Clk) then
r_switch_1 <= w_switch_1;
r_switch_2 <= w_switch_2;
r_switch_3 <= w_switch_3;
r_switch_4 <= w_switch_4;
r_switch_5 <= w_switch_5;
r_switch_6 <= w_switch_6;
r_switch_7 <= w_switch_7;
r_switch_8 <= w_switch_8;
end if;
end process p_Register;
o_LED_1 <= r_switch_1;
o_LED_2 <= i_Switch_2;
o_LED_3 <= i_Switch_3;
o_LED_4 <= i_Switch_4;
o_LED_5 <= i_Switch_5;
o_LED_6 <= i_Switch_6;
o_LED_7 <= i_Switch_7;
o_LED_8 <= i_Switch_8;
o_LED_2 <= r_switch_2;
o_LED_3 <= r_Switch_3;
o_LED_4 <= r_Switch_4;
o_LED_5 <= r_Switch_5;
o_LED_6 <= r_Switch_6;
o_LED_7 <= r_Switch_7;
o_LED_8 <= r_Switch_8;
-- 7-Segment count
process (r_switch_1, i_Switch_2, w_segment, w_decode)
seg_decode : process (r_switch_1, i_Switch_2, w_segment, w_decode) is
begin
if (rising_edge(r_switch_1) and i_Switch_2 = '1') then
if ((rising_edge(r_switch_1) and r_switch_2 = '1') or (r_switch_1 = '1' and rising_edge(r_switch_2))) then
w_segment <= w_segment + 1;
o_Segment1_DP <= not o_Segment1_DP;
end if;
-- 7-segment logic
case w_segment is
......@@ -112,7 +185,7 @@ begin
when 15 => -- F
w_decode <= X"47";
end case;
end process;
end process seg_decode;
o_Segment1_A <= w_decode(6);
o_Segment1_B <= w_decode(5);
......
......@@ -12,7 +12,7 @@ end entity Debounce_Switch;
architecture RTL of Debounce_Switch is
-- Set for 250,000 clock ticks of 25 MHz clock (10 ms)
-- 10ms Delay bei 25MHz (250.000)
constant c_DEBOUNCE_LIMIT : integer := 250000;
signal r_Count : integer range 0 to c_DEBOUNCE_LIMIT := 0;
......@@ -23,18 +23,16 @@ begin
p_Debounce : process (i_clk) is
begin
if rising_edge(i_clk) then
-- Switch input is different than internal switch value, so an input is
-- changing. Increase counter until it is stable for c_DEBOUNCE_LIMIT.
-- nach State-Change suchen
if (i_Switch /= r_State and r_Count < c_DEBOUNCE_LIMIT) then
r_Count <= r_Count + 1;
-- End of counter reached, switch is stable, register it, reset counter
-- Zeit verstrichen, Button stabil
elsif r_Count = c_DEBOUNCE_LIMIT then
r_State <= i_Switch;
r_Count <= 0;
-- Switches are the same state, reset the counter
-- Reset
else
r_Count <= 0;
......@@ -42,7 +40,7 @@ begin
end if;
end process p_Debounce;
-- Assign internal register to output (debounced!)
-- Weiterreichen zum Output
o_Switch <= r_State;
end architecture RTL;
......
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