Commit 4706f27b authored by Synthron's avatar Synthron
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parent 80fe9b01
B<?xml version="1.0" encoding="utf-16"?>
<?xml version='1.0' encoding='utf-8' ?>
<!DOCTYPE ispXCF SYSTEM "IspXCF.dtd" >
<ispXCF version="3.9.0">
<Comment></Comment>
<Chain>
<Comm>JTAG</Comm>
<Device>
<SelectedProg value="TRUE"/>
<Pos>1</Pos>
<Vendor>WinBond</Vendor>
<Family>iCE40</Family>
<Name>iCE40HX4K</Name>
<Package>All</Package>
<Bypass>
<InstrLen>8</InstrLen>
<InstrVal>11111111</InstrVal>
<BScanLen>1</BScanLen>
<BScanVal>0</BScanVal>
</Bypass>
<File>F:/lscc/iCEcube2.2017.08/sbt_backend/Projects/FPGA-Devboard/Blinky/Blinky_Implmnt/sbt/outputs/bitmap/Switches_To_LEDs_bitmap.bin</File>
<FileTime>05/29/20 18:21:07</FileTime>
<Operation>SPI Flash Erase,Program,Verify</Operation>
<Option>
<SVFVendor>JTAG STANDARD</SVFVendor>
<AccessMode>SPI Flash Programming</AccessMode>
</Option>
<FPGALoader>
<CPLDDevice>
<Device>
<Pos>1</Pos>
<Vendor>Lattice</Vendor>
<Family>iCE40</Family>
<Name>iCE40HX4K</Name>
<IDCode>0x11008639</IDCode>
<Package>All</Package>
<PON>iCE40HX4K</PON>
<Bypass>
<InstrLen>8</InstrLen>
<InstrVal>11111111</InstrVal>
<BScanLen>1</BScanLen>
<BScanVal>0</BScanVal>
</Bypass>
<Operation>Bypass</Operation>
<Option>
<SVFVendor>JTAG STANDARD</SVFVendor>
<IOState>HighZ</IOState>
<IOVectorData>
</IOVectorData>
<AccessMode>JTAG</AccessMode>
</Option>
</Device>
</CPLDDevice>
<FlashDevice>
<Device>
<Pos>1</Pos>
<Vendor>WinBond</Vendor>
<Family>SPI Serial Flash</Family>
<Name>W25X20</Name>
<IDCode>0x11</IDCode>
<Package>8-pin SOIC</Package>
<Operation>SPI Flash Erase,Program,Verify</Operation>
<File>F:/lscc/iCEcube2.2017.08/sbt_backend/Projects/FPGA-Devboard/Blinky/Blinky_Implmnt/sbt/outputs/bitmap/Switches_To_LEDs_bitmap.bin</File>
<AddressBase>0x00000000</AddressBase>
<EndAddress>0x00020000</EndAddress>
<DeviceSize>2</DeviceSize>
<DataSize>135180</DataSize>
<NumberOfDevices>1</NumberOfDevices>
<ReInitialize value="FALSE"/>
</Device>
</FlashDevice>
<FPGADevice>
<Device>
<Pos>1</Pos>
<Name></Name>
<File>F:/lscc/iCEcube2.2017.08/sbt_backend/Projects/FPGA-Devboard/Blinky/Blinky_Implmnt/sbt/outputs/bitmap/Switches_To_LEDs_bitmap.bin</File>
<LocalChainList>
<LocalDevice index="-99"
name="Unknown"
file="F:/lscc/iCEcube2.2017.08/sbt_backend/Projects/FPGA-Devboard/Blinky/Blinky_Implmnt/sbt/outputs/bitmap/Switches_To_LEDs_bitmap.bin"/>
</LocalChainList>
<Option>
<SVFVendor>JTAG STANDARD</SVFVendor>
</Option>
</Device>
</FPGADevice>
</FPGALoader>
</Device>
</Chain>
<ProjectOptions>
<Program>SEQUENTIAL</Program>
<Process>ENTIRED CHAIN</Process>
<OperationOverride>No Override</OperationOverride>
<StartTAP>TLR</StartTAP>
<EndTAP>TLR</EndTAP>
<DisableCheckBoard value="TRUE"/>
<VerifyUsercode value="FALSE"/>
<TCKDelay>1</TCKDelay>
</ProjectOptions>
<CableOptions>
<CableName>USB2</CableName>
<PortAdd>FTUSB-0</PortAdd>
</CableOptions>
</ispXCF>
library ieee;
use ieee.std_logic_1164.all;
entity Switches_To_LEDs is
port (
-- Push-Button Switches:
i_Switch_1 : in std_logic;
i_Switch_2 : in std_logic;
i_Switch_3 : in std_logic;
i_Switch_4 : in std_logic;
i_Switch_5 : in std_logic;
i_Switch_6 : in std_logic;
i_Switch_7 : in std_logic;
i_Switch_8 : in std_logic;
-- LED Pins:
o_LED_1 : out std_logic;
o_LED_2 : out std_logic;
o_LED_3 : out std_logic;
o_LED_4 : out std_logic;
o_LED_5 : out std_logic;
o_LED_6 : out std_logic;
o_LED_7 : out std_logic;
o_LED_8 : out std_logic;
-- 7-Segment:
o_Segment1_A : out std_logic;
o_Segment1_B : out std_logic;
o_Segment1_C : out std_logic;
o_Segment1_D : out std_logic;
o_Segment1_E : out std_logic;
o_Segment1_F : out std_logic;
o_Segment1_G : out std_logic
);
end entity Switches_To_LEDs;
architecture RTL of Switches_To_LEDs is
signal w_segment : integer range 0 to 15 := 0;
signal w_block : std_logic := '0';
begin
-- swtich LEDs
o_LED_1 <= i_Switch_1;
o_LED_2 <= i_Switch_2;
o_LED_3 <= i_Switch_3;
o_LED_4 <= i_Switch_4;
o_LED_5 <= i_Switch_5;
o_LED_6 <= i_Switch_6;
o_LED_7 <= i_Switch_7;
o_LED_8 <= i_Switch_8;
-- 7-Segment count
process (i_Switch_1, i_Switch_2, w_block, w_segment)
begin
if (i_Switch_1 = '1' and i_Switch_2 = '1' and w_block = '0') then
w_segment <= w_segment + 1;
w_block <= '1';
elsif (i_Switch_1 /= i_Switch_2 and w_block = '1') then
w_block <= '0';
end if;
-- 7-segment logic
case w_segment is
when 0 =>
o_Segment1_A <= '1';
o_Segment1_B <= '1';
o_Segment1_C <= '1';
o_Segment1_D <= '1';
o_Segment1_E <= '1';
o_Segment1_F <= '1';
o_Segment1_G <= '0';
when 1 =>
o_Segment1_A <= '0';
o_Segment1_B <= '1';
o_Segment1_C <= '1';
o_Segment1_D <= '0';
o_Segment1_E <= '0';
o_Segment1_F <= '0';
o_Segment1_G <= '0';
when 2 =>
o_Segment1_A <= '1';
o_Segment1_B <= '1';
o_Segment1_C <= '0';
o_Segment1_D <= '1';
o_Segment1_E <= '1';
o_Segment1_F <= '0';
o_Segment1_G <= '1';
when 3 =>
o_Segment1_A <= '1';
o_Segment1_B <= '1';
o_Segment1_C <= '1';
o_Segment1_D <= '1';
o_Segment1_E <= '0';
o_Segment1_F <= '0';
o_Segment1_G <= '1';
when 4 =>
o_Segment1_A <= '0';
o_Segment1_B <= '1';
o_Segment1_C <= '1';
o_Segment1_D <= '0';
o_Segment1_E <= '0';
o_Segment1_F <= '1';
o_Segment1_G <= '1';
when 5 =>
o_Segment1_A <= '1';
o_Segment1_B <= '0';
o_Segment1_C <= '1';
o_Segment1_D <= '1';
o_Segment1_E <= '0';
o_Segment1_F <= '1';
o_Segment1_G <= '1';
when 6 =>
o_Segment1_A <= '1';
o_Segment1_B <= '0';
o_Segment1_C <= '1';
o_Segment1_D <= '1';
o_Segment1_E <= '1';
o_Segment1_F <= '1';
o_Segment1_G <= '1';
when 7 =>
o_Segment1_A <= '1';
o_Segment1_B <= '1';
o_Segment1_C <= '1';
o_Segment1_D <= '0';
o_Segment1_E <= '0';
o_Segment1_F <= '0';
o_Segment1_G <= '0';
when 8 =>
o_Segment1_A <= '1';
o_Segment1_B <= '1';
o_Segment1_C <= '1';
o_Segment1_D <= '1';
o_Segment1_E <= '1';
o_Segment1_F <= '1';
o_Segment1_G <= '1';
when 9 =>
o_Segment1_A <= '1';
o_Segment1_B <= '1';
o_Segment1_C <= '1';
o_Segment1_D <= '1';
o_Segment1_E <= '0';
o_Segment1_F <= '1';
o_Segment1_G <= '1';
when 10 => -- A
o_Segment1_A <= '1';
o_Segment1_B <= '1';
o_Segment1_C <= '1';
o_Segment1_D <= '0';
o_Segment1_E <= '1';
o_Segment1_F <= '1';
o_Segment1_G <= '1';
when 11 => -- b
o_Segment1_A <= '0';
o_Segment1_B <= '0';
o_Segment1_C <= '1';
o_Segment1_D <= '1';
o_Segment1_E <= '1';
o_Segment1_F <= '1';
o_Segment1_G <= '1';
when 12 => -- C
o_Segment1_A <= '1';
o_Segment1_B <= '0';
o_Segment1_C <= '0';
o_Segment1_D <= '1';
o_Segment1_E <= '1';
o_Segment1_F <= '1';
o_Segment1_G <= '0';
when 13 => -- d
o_Segment1_A <= '0';
o_Segment1_B <= '1';
o_Segment1_C <= '1';
o_Segment1_D <= '1';
o_Segment1_E <= '1';
o_Segment1_F <= '0';
o_Segment1_G <= '1';
when 14 => -- E
o_Segment1_A <= '1';
o_Segment1_B <= '0';
o_Segment1_C <= '0';
o_Segment1_D <= '1';
o_Segment1_E <= '1';
o_Segment1_F <= '1';
o_Segment1_G <= '1';
when 15 => -- F
o_Segment1_A <= '1';
o_Segment1_B <= '0';
o_Segment1_C <= '0';
o_Segment1_D <= '0';
o_Segment1_E <= '1';
o_Segment1_F <= '1';
o_Segment1_G <= '1';
end case;
end process;
end RTL;
\ No newline at end of file
library ieee;
use ieee.std_logic_1164.all;
entity Switches_To_LEDs is
port (
-- Push-Button Switches:
i_Switch_1 : in std_logic;
i_Switch_2 : in std_logic;
i_Switch_3 : in std_logic;
i_Switch_4 : in std_logic;
i_Switch_5 : in std_logic;
i_Switch_6 : in std_logic;
i_Switch_7 : in std_logic;
i_Switch_8 : in std_logic;
-- LED Pins:
o_LED_1 : out std_logic;
o_LED_2 : out std_logic;
o_LED_3 : out std_logic;
o_LED_4 : out std_logic;
o_LED_5 : out std_logic;
o_LED_6 : out std_logic;
o_LED_7 : out std_logic;
o_LED_8 : out std_logic
);
end entity Switches_To_LEDs;
architecture RTL of Switches_To_LEDs is
begin
-- swtich LEDs
o_LED_1 <= i_Switch_1;
o_LED_2 <= i_Switch_2;
o_LED_3 <= i_Switch_3;
o_LED_4 <= i_Switch_4;
o_LED_5 <= i_Switch_5;
o_LED_6 <= i_Switch_6;
o_LED_7 <= i_Switch_7;
o_LED_8 <= i_Switch_8;
end RTL;
\ No newline at end of file
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